Circuit arrangement for preparing core voltage from higher working voltage, includes p-channel FET connected between operating voltage terminal and core voltage terminal

摘要

A circuit arrangement of a working voltage converter for preparing a core voltage, is arranged chip-internally in the CMOS circuit which is provided with a working voltage terminal and a ground terminal. Between the operating voltage terminal (VDD ext) and the core voltage terminal (11) is connected a P-channel FET with source and drain terminals as a control transistor, and its gate is joined to the output of an op.amp. controlled by a reference voltage source and a voltage- or current-source is provided with its output forming a virtual ground, the potential of which is above the normal ground potential. An independent claim is included for a method for preparing a core voltage from a higher working voltage.