METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To suppress variations of the threshold voltage of a transistor caused by an inter-diffusion of impurities between both gate electrodes in a dual gate electrode structure. SOLUTION: A gate insulating film 5 is formed in an active region composed of a silicon substrate 1 including an n-type MIS transistor formation region RTn and a p-type MIS transistor formation region RTp. A polysilicon film 6 is formed thereafter. A resist 7 that covers the p-type MIS transistor formation region RTp is then formed on the polysilicon film 6. An As injection layer 6As is then formed by the oblique ion implantation of arsenic with the resist 7 as a mask. Furthermore, a p injection layer 6P is formed by the ion implantation of phosphorus (P) with the resist 7 as a mask. Short-time heat treatment (RTA) is then performed to activate arsenic and phosphorus in the polysilicon film 6. COPYRIGHT: (C)2005,JPO&NCIPI