发明名称 Data converters with ternary pulse width modulation output stages and methods and systems using the same
摘要 A pulse width modulator includes at least one input for receiving an input signal and pulse width modulation circuitry for generating a pulse width modulated stream and another pulse width modulated stream. The pulse width modulated stream and the another pulse width modulated stream are nominally out of phase and together represent the received input signal. A summer sums the pulse width modulated stream and the another pulse width modulated stream to generate an analog output signal.
申请公布号 US6885330(B2) 申请公布日期 2005.04.26
申请号 US20030656749 申请日期 2003.09.05
申请人 CIRRUS LOGIC, INC. 发明人 TROTTER BRIAN DAVID;DUEWER BRUCE;MELANSON JOHN LAURENCE
分类号 H03M1/06;H03M1/08;H03M1/66;H03M3/04;(IPC1-7):H03M1/82 主分类号 H03M1/06
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