发明名称 Analog-to-digital conversion circuit and image processing circuit for stepwise conversion of a signal through multiple stages of conversion units
摘要 A multi-stage pipelined AD converter has n stages of conversion units, such as a first conversion unit, a second conversion unit, an (n-1)th conversion unit, and an nth conversion unit, which successively convert an analog signal into a digital signal each by several bits starting from the most significant bit. Each of the converted digital signals of several bits is combined in a digital output circuit. A first voltage source supplies a higher voltage than a second voltage source. The first voltage source supplies a high voltage to the first stage or the first conversion unit, while the second voltage source supplies a low voltage to the second and subsequent stages of the second conversion unit to the nth conversion unit which require a lower analog accuracy.
申请公布号 US6882297(B2) 申请公布日期 2005.04.19
申请号 US20040808566 申请日期 2004.03.25
申请人 SANYO ELECTRIC CO., LTD. 发明人 WADA ATSUSHI;TANI KUNIYUKI
分类号 H03M1/44;H03M1/00;H03M1/12;H03M1/14;H03M1/16;H03M1/38;H03M1/46;H03M1/60;(IPC1-7):H03M1/38 主分类号 H03M1/44
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