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发明名称
具最佳化线搭接定位之半导体封装
摘要
紧密间隔之搭接线可用于多种不同封装应用以达成改良之电效能。在一实施例中,若在一线组内之两邻近搭接线之间,较短线之长度的至少50%长度符合该等两邻近线之间的间隔距离D,则该等两邻近线为紧密间隔。在一实施例中,间隔距离D至多为两邻近线中直径较大之线的直径的两倍。在另一实施例中,间隔距离D至多为两邻近线间之线-线间距的三倍。每一线组均可包括该等更紧密间隔之线中的二者。紧密间隔搭接线之线组可用于形成(诸如)电源-讯号-接地三线组、讯号-接地线对、讯号-电源线对或差动讯号线对或三线组。
申请公布号
TW200514223
申请公布日期
2005.04.16
申请号
TW093116597
申请日期
2004.06.09
申请人
飞思卡尔半导体公司
发明人
罗伯J 温卓;彼得R 哈柏
分类号
H01L23/48
主分类号
H01L23/48
代理机构
代理人
陈长文
主权项
地址
美国
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