发明名称 Semiconductor device
摘要 A chip size is remarkably reduced by providing effective layout of the I/O buffers. Since a large capacity non-volatile memory is arranged, bonding pads are arranged at the area near each side of the rectangular shape semiconductor chip and the I/O buffers are arranged in the side of the internal circuit area of these bonding pads. In this semiconductor chip, the number of I/O buffers in the side of the longer sides is larger than that in the side of the shorter sides of the semiconductor chip. For example, the n I/O buffers are arranged respectively in the side of two longer sides, while (n-2) I/O buffers are arranged respectively in the side of two shorter sides. Accordingly, the I/O buffers can be arranged without unnecessary increase in the chip area.
申请公布号 US2005078540(A1) 申请公布日期 2005.04.14
申请号 US20040956140 申请日期 2004.10.04
申请人 RENESAS TECHNOLOGY CORP. 发明人 SHIMANUKI TAKESHI
分类号 H01L27/04;G11C5/02;G11C7/10;H01L21/82;H01L21/822;(IPC1-7):G11C11/34 主分类号 H01L27/04
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