发明名称 Packet manager interrupt mapper
摘要 A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with an interrupt mapper for informing a plurality of processors about system-related functions for a plurality of channels. Using status registers containing interrupt status information for the plurality of channels, interrupt sources are specifically assigned to individual processors in the multiprocessor device so that the assigned processor can efficiently determine the source and priority of an interrupt by reading the register information.
申请公布号 US2005078694(A1) 申请公布日期 2005.04.14
申请号 US20030685017 申请日期 2003.10.14
申请人 BROADCOM CORPORATION 发明人 ONER KORAY
分类号 G06F13/40;G06F15/167;H04L12/28;(IPC1-7):G06F15/167 主分类号 G06F13/40
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