发明名称 SYSTEM AND METHOD FOR REDUCING VOLTAGE FLUCTUATION
摘要 PROBLEM TO BE SOLVED: To provide a system and a method for reducing a voltage fluctuation such as the undershoot and/or overshoot of a supply voltage in an integrated circuit chip or the like. SOLUTION: According to one embodiment, a delay system 14 supplies the delaying section of a first reference signal in response to the supply voltage. A comparator 16 supplies a control signal controlling a protective device 18 on the basis of the delaying section of the first reference signal and a second reference signal. A voltage threshold is determined by the quantity of a delay supplied by the delay system, and the comparator supplies the control signal on the basis of the voltage threshold value. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005102197(A) 申请公布日期 2005.04.14
申请号 JP20040256805 申请日期 2004.09.03
申请人 HEWLETT-PACKARD DEVELOPMENT CO LP 发明人 NAFFZIGER SAMUEL D
分类号 H03K5/26;H03K5/00;H03K5/08;H03K17/082;(IPC1-7):H03K5/26 主分类号 H03K5/26
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