发明名称 |
Non-volatile memory with induced bit lines |
摘要 |
An electrically programmable non-volatile memory cell is provided. A semiconductor substrate is prepared. A pair of spaced apart source/drain (S/D) regions is defined on the semiconductor substrate. The spaced apart S/D regions define a channel region in between. A first dielectric layer such as silicon dioxide is disposed on the S/D regions. An assistant gate is stacked on the first dielectric layer. The assistant gate has a top surface and sidewalls. A second dielectric layer comprising a charge-trapping layer is uniformly disposed on the top surface and sidewalls of the assistant gate and is also disposed on the channel region. The second dielectric layer provides a recessed trough between the S/D regions. A conductive gate material fills the recessed trough for controlling said channel region.
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申请公布号 |
US6878988(B1) |
申请公布日期 |
2005.04.12 |
申请号 |
US20040709854 |
申请日期 |
2004.06.02 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
LEE TZYH-CHEANG;PENG NAI-CHEN;SHIH CHUNGCHIN;CHENG CHING-HUNG |
分类号 |
H01L21/336;H01L21/8246;H01L27/115;H01L29/792;(IPC1-7):H01L29/792 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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