SRAM compatible and Synchronous Memory Device being controlled by a signal, the signal activating in Chip disable period,申请号KR20020050917-传众专利搜索

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发明名称	SRAM compatible and Synchronous Memory Device being controlled by a signal, the signal activating in Chip disable period
摘要
申请公布号	KR100481819(B1)	申请公布日期	2005.04.11
申请号	KR20020050917	申请日期	2002.08.27
申请人		发明人
分类号	G11C11/401;G11C8/02;G11C11/406;(IPC1-7):G11C11/401	主分类号	G11C11/401
代理机构		代理人
主权项
地址

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