CRC CODE ARITHMETIC CIRCUIT, FCS GENERATING CIRCUIT, AND MAC CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a MAC circuit or the like for carrying out a CRC code arithmetic operation by parallel arithmetic operations from parallel data the length of which being an arithmetic object is changed so as to generate an FCS code. SOLUTION: A buffer circuit 9 checks a data length of transmission data 7 to detect a data length being an arithmetic object for generating the FCS code, and an FCS generating section 8 has a plurality of CRC code arithmetic circuits capable of carrying out arithmetic operations in parallel with an optional bit width resulting from uniformly dividing the transmission data received in parallel, and the FCS generating circuit generates the FCS code of the transmission data whose data length is changed according to the data length denoting the bit width of the transmission data being the arithmetic operation notified from the buffer circuit. COPYRIGHT: (C)2005,JPO&NCIPI