发明名称 Bent gate transistor modeling
摘要 A method of characterizing a total width and an overall effective length for a bent gate. The bent gate is divided into logical portions, and each of the logical portions is designated as one of a bent portion, a corner portion, and a straight portion. A corner portion gate width and a corner portion effective length are computed for each of the logical portions designated as a corner portion. Similarly, a bent portion gate width and a bent portion effective length are computed for each of the logical portions designated as a bent portion. Likewise, a straight portion gate width and a straight portion effective length are computed for each of the logical portions designated as a straight portion. The total width of the bent gate is computed from the corner portion gate width, the bent portion gate width, and the straight portion gate width. Similarly, the overall effective length of the bent gate is computed from the corner portion effective length, the bent portion effective length, and the straight portion effective length.
申请公布号 US6871333(B2) 申请公布日期 2005.03.22
申请号 US20020265803 申请日期 2002.10.07
申请人 LSI LOGIC CORPORATION 发明人 PARK SANGJUNE;DAVIS ROBERT W.
分类号 G06F17/50;(IPC1-7):G06F9/45 主分类号 G06F17/50
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