发明名称 |
DEBUGGER APPARATUS AND DEBUGGING METHOD |
摘要 |
<P>PROBLEM TO BE SOLVED: To reduce costs by miniaturizing a built-in emulation memory as much as possible in a debugger apparatus of a system LSI to which an ICE (in-circuit emulator) is not used and which operates at high speed. <P>SOLUTION: A host PC 102 is a computer loaded with debugger software. Writing to the built-in emulation memory with small capacity is efficiently performed, and overhead resulting from transfer traffic is prevented and the instructions are efficiently supplied to a CPU by preliminarily tracing instructions in an instruction executing order by the host PC 102, and transferring and storing the instructions in emulation memories 115, 116. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
申请公布号 |
JP2005071341(A) |
申请公布日期 |
2005.03.17 |
申请号 |
JP20040227634 |
申请日期 |
2004.08.04 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
MORIKAWA TORU;WATANABE KAZUTSUGU;MIYAJI SHINYA |
分类号 |
G06F11/28;G06F11/22;G06F15/78 |
主分类号 |
G06F11/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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