| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce current consumption by detecting an address change and an input data change, determining whether normal operation is performed or not when a clock is inputted, and stopping needless operation such as the read-out operation of the same address and the write-in of the same data. <P>SOLUTION: In this semiconductor memory device provided with a memory cell array 10 in which a plurality of memory cells are arranged in a matrix state and performing read-out operation and write-in operation by arbitrary address information and a clock, the device is provided with an input data change detecting circuit 91 detecting the change of a data input signal and outputting a detected signal and a control means 30 controlling a data input latch signal based on the detected signal of the this input data change detecting circuit 91, the control means 30 holds the data input latch signal at a latch state when the input data change detecting circuit 91 does not detect a change in write-in operation. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
