发明名称 Method and apparatus for hardware data speculation to support memory optimizations
摘要 According to one embodiment a computer method and apparatus for causing a computer to perform a speculative read re-ordered load is disclosed. A speculative read re-ordered load instruction is inserted into the instruction sequence to optimize the code. Memory conflict information representing the speculative read re-ordered load is stored. When a later potentially conflicting load is executed, its physical address is matched against the physical address of the stored memory conflict information. If the potentially conflicting load has a matching physical address and a different value than the stored memory conflict information representing the speculative read re-ordered load, then the stored memory conflict information is invalidated.
申请公布号 US2005055516(A1) 申请公布日期 2005.03.10
申请号 US20030658897 申请日期 2003.09.10
申请人 MENON VIJAY S.;MURPHY BRIAN;ADL-TABATABAI ALI-REZA;SHPEISMAN TATIANA 发明人 MENON VIJAY S.;MURPHY BRIAN;ADL-TABATABAI ALI-REZA;SHPEISMAN TATIANA
分类号 G06F9/38;G06F9/45;G06F12/00;(IPC1-7):G06F12/00 主分类号 G06F9/38
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