发明名称 MEMORY DEVICE AND MEMORY BUS TRANSMISSION SYSTEM
摘要 PROBLEM TO BE SOLVED: To solve a problem that the transmission of hundreds of MHz signals between a mother board and a memory module through a bus interconnect line causes a decrease in the quality of signal by disturbing the wave of the signal during the transmission of the signal in a semiconductor memory device. SOLUTION: A bypass capacitor is arranged near a portion at which a plane between the bus wiring layer of multilayer interconnection layer used for the mother board and the memory module, and conductive layer is changed. As a result of this, the disturbance of feedback current of high-frequency signal applied to the bus wiring layer is alleviated, the impairment of quality of signal wave which is caused by the feedback current is prevented, and the radiation of unnecessary electromagnetic wave which is caused by the feedback current is prevented simultaneously. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005045274(A) 申请公布日期 2005.02.17
申请号 JP20040235904 申请日期 2004.08.13
申请人 ELPIDA MEMORY INC 发明人 ISA SATOSHI;NISHIO YOJI
分类号 G06F12/00;G06F13/16;H05K1/14;H05K9/00;(IPC1-7):H05K1/14 主分类号 G06F12/00
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