| 摘要 |
PROBLEM TO BE SOLVED: To provide an instruction execution method using a high-performance RISC-based superscalar processor, which is suitably used by a microprocessor. SOLUTION: The microprocessor for fetching, interpreting and executing instruction sets from an instruction store comprises an instruction set acquisition means for acquiring predetermined instruction sets for execution which include instructions referring to registers; a data store means for storing data in a plurality of registers including a predetermined register and a temporary register; and an execution means, coupled to the instruction set acquisition means, for successively executing the predetermined instruction sets, which instructs to store data processed by instructions for out-of-order execution in the temporary register, the register for reference by the instructions for out-of-order execution being the predetermined register. COPYRIGHT: (C)2005,JPO&NCIPI
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