| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an external bus interface circuit that realizes parallel communication with an external integrated circuit while minimizing a circuit scale and maintaining access security of an integrated circuit. <P>SOLUTION: An integrated circuit 101 having an internal CPU 102 and an internal SRAM 103 is mounted with the external interface having a parallel communication SRAM 104 accessible to both internal CPU 102 and external CPU 110 and a bus control circuit 105 having an arbitration function 105a of arbitrating access from the internal CPU 102 and access from the external CPU 110 and for executing access control denying access from the external CPU 110 to the internal SRAM 103. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
