发明名称 SEMICONDUCTOR MEMORY HAVING CHARGE-TRAP MEMORY CELL
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory having a charge-trap memory cell which is divided into slices, and has a type of virtual ground architecture. SOLUTION: The potential trap memory architecture of virtual ground has an interconnection (6) which exists in parallel with a word line (2), and a separation 1 between STI elements which exists in parallel with a bit line (4). A separation (7) between STI elements in which the width is expanded in order to divide into slices, is provided. In place of the same, the interconnection which exists under the bit line can be omitted, or two bit lines (41, 42) which are adjoined each other can be connected, so that a memory transistor which exists among these operate only in dummy modes. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005039278(A) 申请公布日期 2005.02.10
申请号 JP20040209221 申请日期 2004.07.15
申请人 INFINEON TECHNOLOGIES AG;INFINEON TECHNOLOGIES FLASH GMBH & CO KG 发明人 WILLER JOSEF DR;LUDWIG CHRISTOPH;DEPPE JOACHIM
分类号 H01L21/8247;H01L21/8246;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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