发明名称 Memory arrangement in a computer system
摘要 A memory arrangement in a computer system can have at least one memory module with semiconductor components, which are arranged on the memory module, can be operated in parallel and are additionally connected to one another via a serial line. The memory arrangement can have an interface bus for driving the semiconductor components on a module-specific basis, and an interface, which is driven by a memory controller assigned to the memory module via the interface bus and accesses the semiconductor components via the serial line. During normal operation, it is possible to test and adjust the semiconductor components in proximity to the application and on a chip-specific basis via the interface.
申请公布号 US2005028040(A1) 申请公布日期 2005.02.03
申请号 US20040902160 申请日期 2004.07.30
申请人 PERNER MARTIN 发明人 PERNER MARTIN
分类号 G06F11/00;G06F11/22;G06F11/27;G06F11/273;G06F12/00;G11C29/00;(IPC1-7):G06F11/00 主分类号 G06F11/00
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