发明名称 METHOD FOR PLANARIZING INTERLAYER DIELECTRIC WITH GLOBAL PLANARIZATION CAPABILITY IN SEMICONDUCTOR DEVICE HAVING MIM PATTERN
摘要 PURPOSE: A method for planarizing an interlayer dielectric of a semiconductor device having MIM(Metal Insulator Metal) patterns is provided to be capable of obtaining global planarization capability. CONSTITUTION: A silicon substrate(21) defined with a first region(A) stacked sequentially metal patterns(23a,23b) and MIM patterns(25) thereon and a second region(B) having the metal patterns is prepared. An interlayer dielectric is formed on the entire surface of the resultant structure. A planarized interlayer dielectric(27a) is formed by selectively etching the interlayer dielectric overlapped with the MIM patterns. CMP(Chemical Mechanical Polishing) is then performed to obtain global planarization.
申请公布号 KR20050012639(A) 申请公布日期 2005.02.02
申请号 KR20030051776 申请日期 2003.07.26
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 KWON, BYOUNG HO
分类号 H01L21/304;(IPC1-7):H01L21/304 主分类号 H01L21/304
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