| 摘要 |
A device for associating indexes to addresses chosen from among a greater number of values than the number of available indexes, including a memory containing indexes and respective check words corresponding to predetermined bits of the addresses associated with the indexes; a packing circuit receiving a current address and suppressing in this address bits determined by a pattern such that the suppressed bits correspond to bits of the check words, the packed address provided by the packing circuit being used to select in the read mode a memory location; and a comparator indicating that the current address corresponds to the selected memory location if the bits of the check word of the selected location are equal to the corresponding bits of the current address. |
