发明名称 IMPEDANCE ADJUSTING CIRCUIT AND ADJUSTMENT METHOD, AND SEMICONDUCTOR DEVICE EQUIPPED THEREWITH
摘要 PROBLEM TO BE SOLVED: To provide an impedance adjusting circuit which prevents a malfunction due to noise. SOLUTION: The impedance adjusting circuit comprises an external resistor R20, a comparator 23 for comparing one end potential of the external resistor with a specified voltage, a counter 25 for outputting a control signal corresponding to its count value varying according to the output of the comparator 23, an NMOS array 26 connected to one end of the resistor R20 for providing a resistance value varying according to the control signal, and an NMOS mediating circuit 24 for detecting the output of the comparator 23 over three times to output a signal determined by the majority decision theory over these detected signals to the counter. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005026890(A) 申请公布日期 2005.01.27
申请号 JP20030188721 申请日期 2003.06.30
申请人 NEC CORP 发明人 OGURI TAKASHI
分类号 G06F3/00;H01L21/822;H01L27/04;H03K19/00;H03K19/0175;H03K19/23;H04L25/02;(IPC1-7):H03K19/017 主分类号 G06F3/00
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