发明名称 |
VOLTAGE SHIFT CONTROL CIRCUIT FOR PLL |
摘要 |
A PLL structure comprises a PFD, a loop filter and a VCO, as well as a voltage shift capacitor (Ca) coupling the PFD and the VCO. A voltage shift control circuit (50) is placed in parallel with the voltage shift capacitor. This circuit comprises controlled charging means (51), which are designed to charge the voltage shift capacitor according to a channel control signal. It also comprises controlled pre-charging means (52) which are designed to accelerate the charging of the voltage shift capacitor by the controlled charging means. It further comprises controlled biasing means (53), designed to ensure the bias of the input during the pre-charging of the voltage shift capacitor. |
申请公布号 |
WO2004105249(A3) |
申请公布日期 |
2005.01.27 |
申请号 |
WO2004EP06063 |
申请日期 |
2004.05.17 |
申请人 |
EADS TELECOM;ROBBE, MICHEL;GUEGNAUD, HERVE |
发明人 |
ROBBE, MICHEL;GUEGNAUD, HERVE |
分类号 |
H03L7/093;H03L7/187;H04Q7/32 |
主分类号 |
H03L7/093 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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