| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce size and weight in a composite memory device by reducing control input terminals. <P>SOLUTION: The device is the composite memory device in which two memory chips #0 and #1 are mounted inside one package. Data readout and data write operation for each of the chips are controlled by a first control signal for bank enabling inputted from a first control input terminal BE0# for bank enabling, a second control signal for bank enabling inputted from a second control input terminal BE1# for bank enabling and a common control signal for output enabling/write enabling inputted from control input terminals OE/WE# for the output enabling/write enabling. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
