发明名称 |
Interleaver for digital signal decoding device, has addressing device to transmit, at each instant of clock, reading and writing instructions respectively to two RAMs, such that at each instant, data is written/read from each RAM |
摘要 |
<p>The interleaver has two random access memories (RAMs) (10, 11) to store data, and an addressing device (100) connected to respective address inputs of the RAMs. The device is arranged to transmit, at each instant of a clock, a reading instruction to one of the RAMs and a writing instruction to the other RAM, such that data is written in/read from each RAM, at each instant. An independent claim is also included for a digital signal decoding device having an interleaver and a decoder.</p> |
申请公布号 |
FR2857178(A1) |
申请公布日期 |
2005.01.07 |
申请号 |
FR20030008238 |
申请日期 |
2003.07.04 |
申请人 |
STMICROELECTRONICS SA |
发明人 |
URARD PASCAL;PAUMIER LAURENT;LANTREIBECQ ETIENNE |
分类号 |
H03M13/27;(IPC1-7):H03M13/27 |
主分类号 |
H03M13/27 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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