发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To execute a high-speed operation by suppressing the influence of the resistance of a switch transistor and to reduce current consumption by reducing the charged/discharged current of a bit line capacity in the amplification operation of the memory of a semiconductor device. SOLUTION: A pair of bit lines BL1 and XBL1 are connected to a sense amplifier SAMP through an N channel type transistor pair (switch SW1). A P channel type amplifier P<SB>ch</SB>AMP1 and memory cells constituting a memory cell array MCA1 are connected to the pair of bit lines BL1 and XBL1. The P channel type Amplifier P<SB>ch</SB>AMP1 is operated after the operation of the sense amplifier SAMP. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005004908(A) 申请公布日期 2005.01.06
申请号 JP20030168648 申请日期 2003.06.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRANO HIROSHIGE
分类号 G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C11/22
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