发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO IMPROVE WHOLE STEP COVERAGE BY SACRIFICIAL OXIDE PROCESS AND CLEANING PROCESS AND CONTROL TRENCH FILLING DEFECT
摘要 PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to improve step coverage by a sacrificial oxide process and a cleaning process and control a trench filling defect by using a polycrystalline silicon layer instead of a pad nitride layer as an etch barrier material in etching a trench of a substrate. CONSTITUTION: A pad oxide layer is formed on a silicon substrate. A polycrystalline silicon layer is formed as an etch barrier layer on the pad oxide layer. The polycrystalline silicon layer is patterned to expose the pad oxide layer on a field region of the substrate. The exposed pad oxide layer and the field region under the exposed pad oxide layer are etched to form a trench. The resultant structure is oxidized to grow the first oxide layer on the trench and a polycrystalline silicon layer pattern. The first oxide layer is removed. The resultant structure is oxidized again to form the second oxide layer on the trench and a reduced polycrystalline layer pattern. A linear nitride layer is deposited on the second oxide layer. A trench filling oxide layer is formed on the linear nitride layer. A CMP(chemical mechanical polishing) process is performed on the trench filling oxide layer, the linear nitride layer and the second oxide layer until the polycrystalline silicon layer pattern is exposed. The exposed polycrystalline silicon layer pattern is removed. The linear nitride layer, the second oxide layer, the pad oxide layer and the trench filling oxide layer are eliminated.
申请公布号 KR20050001204(A) 申请公布日期 2005.01.06
申请号 KR20030042778 申请日期 2003.06.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHUNG, YUNG SEOK;YOON, HYO SEOB
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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