| 摘要 |
PROBLEM TO BE SOLVED: To reduce development cost, and to reduce a development period. SOLUTION: This designing method includes: a first process (S112) for finding a crosstalk delay margin correlated to a wiring parallel running length limit value; a second process (S113) for generating a setup margin in consideration of the crosstalk delay margin; and a third process (S11) for performing timing design of a signal in reference to the setup margin. By using the setup margin (S113) in consideration of the crosstalk delay margin, timing is made to be proper, so that reduction and increase of the development cost caused by returning in designing accompanied by rearrangement and rewiring are avoided. COPYRIGHT: (C)2005,JPO&NCIPI
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