发明名称 System and method for controlling integrated circuit die height and planarity
摘要 A system and method is disclosed for controlling a height and a planarity of an integrated circuit die. In one advantageous embodiment of the invention, a plurality of patterned metal stops are fabricated on an integrated circuit substrate and covered with die attach material. An integrated circuit die is inserted into the die attach material and placed into a clamping mechanism of a molding machine. The clamping mechanism (1) compresses the die into the die attach material, (2) rotates the die into parallel alignment with the substrate, and (3) pushes the die into contact with the patterned metal stops. In this manner the die height and the die planarity are precisely controlled.
申请公布号 US2005001330(A1) 申请公布日期 2005.01.06
申请号 US20030611153 申请日期 2003.07.01
申请人 STMICROELECTRONICS, INC. 发明人 SIEGEL HARRY MICHAEL;BOND ROBERT HENRY;LAO TOM QUOC
分类号 H01L21/56;H01L21/58;(IPC1-7):H01L21/48;H01L29/40 主分类号 H01L21/56
代理机构 代理人
主权项
地址