发明名称 METHOD FOR FORMING METAL INTERCONNECTION TO AVOID METAL LAYER CMP PROCESS
摘要 PURPOSE: A method for forming a metal interconnection is provided to avoid a metal layer CMP(chemical mechanical polishing) process by selectively depositing a metal layer only in a contact hole through an electroplating process. CONSTITUTION: A conductive pattern(11) of a predetermined type is formed on a wafer(10). An insulation layer(12) is formed on the wafer including the conductive pattern. The insulation layer is selectively etched to form a contact hole(13) exposing a part of the conductive pattern. An electroplating process is performed on the wafer including the contact hole to form a metal interconnection(14) for selectively filling the contact hole.
申请公布号 KR20050000968(A) 申请公布日期 2005.01.06
申请号 KR20030041576 申请日期 2003.06.25
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, SUNG HOON
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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