发明名称 |
METHOD FOR FABRICATING SEMICONDUCTOR TRANSISTOR TO REDUCE DRAIN LEAKAGE CURRENT AT HIGH DRAIN VOLTAGE AND MILLER CAPACITANCE |
摘要 |
PURPOSE: A method for fabricating a semiconductor transistor is provided to reduce a drain leakage current at a high drain voltage and miller capacitance by forming a thick gate oxide layer at a drain. CONSTITUTION: A gate oxide layer is formed on an active region of a semiconductor substrate(21) having a filed oxide layer(23) for defining an isolation region. A part of the gate oxide layer is removed to form the first and second gate oxide layers(25a,25b) with different thicknesses. A gate electrode is formed on the first and second gate oxide layers. A spacer(31) is formed on the side surface of the gate electrode. A source(33) and a drain(35) are formed in the active region of the semiconductor substrate under the side surface of the spacer.
|
申请公布号 |
KR20050000966(A) |
申请公布日期 |
2005.01.06 |
申请号 |
KR20030041574 |
申请日期 |
2003.06.25 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
GONG, MYEONG KOOK;KIM, DO WOO |
分类号 |
H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|