DRAM element with two memory cells and method of making the same

摘要

The unit has a pair of cells (C1, C2) for storing two independent bits and including field effect transistors with grid (4, 14), respectively. A channel is arranged in a source zone (102), and the two transistors are arranged in between the source zone and a drain zone. An electrode of single polarization (24) is arranged between intermediate portions (1, 11) of the two transistors. An independent claim is also included for a method for manufacturing an integrated DRAM on a surface of a substrate.