Manufacturing semiconducting memory device involves providing protective structure in doped region to inhibit existence of leakage current path between gate conductor and doped region

摘要

The method involves providing auxiliary transistor structures (1) required for a lithography step in the semiconducting substrate to compensate for topology differences, providing a region (2) doped with a first conductor type for the auxiliary transistor structures on a section (5) of the substrate surface, providing a gate oxide (3) on a sub-region of the section, providing a conducting coating on the gate oxide as the gate conductor (4) and providing a protective structure (6) in the doped region to inhibit the existence of a leakage current path between the gate conductor and the doped region. An independent claim is also included for the following: (1) an auxiliary transistor structure in a semiconducting substrate.