Hard phase alignment of clock signals using asynchronous level-mode state machine,申请号US20020300446-传众专利搜索

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发明名称	Hard phase alignment of clock signals using asynchronous level-mode state machine
摘要
申请公布号	US6838918(B1)	申请公布日期	2005.01.04
申请号	US20020300446	申请日期	2002.11.19
申请人	XILINX INC	发明人	KAVIANI ALIREZA S
分类号	H03K3/017;H03L7/00;H03L7/083;H03L7/085;(IPC1-7):H03L7/00	主分类号	H03K3/017
代理机构		代理人
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地址

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