发明名称 INTERNAL CLOCK SIGNAL GENERATION CIRCUIT AND METHOD THEREOF, ESPECIALLY BY SWITCHING THE EXTERNAL CLOCK SIGNAL ACCORDING TO AN OUTPUT SIGNAL OF THE OPERATIONAL FREQUENCY DETERMINATION UNIT
摘要 PURPOSE: An internal clock signal generation circuit and a method for generating an internal clock signal are provided to synchronize rising edge of an external clock signal with rising edge of an internal clock signal by generating the internal clock signal according to a frequency state of the external clock signal. CONSTITUTION: An internal clock signal generation circuit includes an operational frequency determination unit and an internal clock signal generator. The operational frequency determination unit(310) determines whether an external clock signal is a low frequency or a high frequency. The internal clock signal generator(320) is used for generating an internal clock signal by wave-shaping the external clock signal according to an output signal of the operational frequency determination unit or outputting the external clock signal as the internal clock signal.
申请公布号 KR20040110316(A) 申请公布日期 2004.12.31
申请号 KR20030039553 申请日期 2003.06.18
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, GI CHEON
分类号 H03K5/05;G11C7/10;H03K3/017;H03K5/159;(IPC1-7):H03K5/05 主分类号 H03K5/05
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