发明名称 Speed enhanced damping output circuit
摘要 An output circuit having undershoot/overshoot reduction, and improved propagation delay. A damping control circuit branch is provided, including a resistor and a diode connected in parallel between a first node and a second node, the second node being coupled to an output node. An output transistor, having a gate, is coupled by its source and drain between a power supply and the second node. A predriver circuit is adapted to receive an input signal and provide a voltage at the gate.
申请公布号 US2004263218(A1) 申请公布日期 2004.12.30
申请号 US20030602175 申请日期 2003.06.24
申请人 HINTERSCHER EUGENE B. 发明人 HINTERSCHER EUGENE B.
分类号 H03K17/16;(IPC1-7):H03B1/00 主分类号 H03K17/16
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