发明名称 |
Method and apparatus for implementing power of two floating point estimation |
摘要 |
A method and apparatus are provided for implementing a power of two estimation function in a general purpose floating-point processor. A floating point number is stored within a memory. The floating point number includes a sign bit, a plurality of exponent bits, and a mantissa having an implied bit and a plurality of fraction bits. In response to a floating-point instruction, the mantissa is partitioned into an integer part and a fraction part, based on the exponent bits. A floating-point result is provided by assigning the integer part of the floating point number as an unbiased exponent of the floating-point result, and by utilizing combinational logic hardware for converting the fraction part of the floating point number to a fraction part of the floating point result.
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申请公布号 |
US2004267853(A1) |
申请公布日期 |
2004.12.30 |
申请号 |
US20030607359 |
申请日期 |
2003.06.26 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION, ARMONK, NEW YORK |
发明人 |
FOSSUM GORDON CLYDE;SCHWINN STEPHEN JOSEPH;TUBBS MATTHEW RAY |
分类号 |
G06F7/552;G06F7/38;G06F7/556;(IPC1-7):G06F7/38 |
主分类号 |
G06F7/552 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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