Methods and apparatus for memory sensing

摘要

The device has ferroelectric memory cells and a pair of complimentary bit lines. A sense amp circuit senses differential voltage applied across sense amp bitlines. A precharge circuit (114) discharges induced voltages resulting from sense bitline connection to ground so that induced voltages are dissipated when a reference voltage (VREF) is subsequently coupled to a reference bitline (SABL) at an end of time period (138). An independent claim is also included for a method of sensing data from a memory cell in a memory device.