发明名称 BUS SYSTEM EQUIPPED WITH CIRCUIT SERIALIZING/PARALLELING DATA OF MASTER/SLAVE DEVICE
摘要 PURPOSE: A bus system equipped with circuit serializing/paralleling data of a master/slave device is provided to transfer each data by using only one 1-bit bus line irrespective of a bit number of each data, and synchronize the transfer of each data with a strobe signal shorter than a cycle of a system clock in order to resolve time delay in case of serial data transfer through one 1-bit bus line. CONSTITUTION: The master device(100) includes the first parallel operation circuit(101) performing a basic function of the master device, and an operative instruction data serializing circuit(104) converting the parallel data transferred from the first parallel operation circuit into the serial data and transmitting it to the slave device(110). The slave device includes the second parallel operation circuit(111) performing the basic function of the slave device, and an operative instruction data paralleling circuit(114) converting the serial data transferred from the operative instruction data serializing circuit into the parallel data and transmitting it to the second paralleling operation device.
申请公布号 KR20040108055(A) 申请公布日期 2004.12.23
申请号 KR20030038796 申请日期 2003.06.16
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KOO, TAE UN
分类号 G06F13/00;(IPC1-7):G06F13/00 主分类号 G06F13/00
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