| 摘要 |
PURPOSE:To enable the use of a low-operational-speed memory element and to ecomonize the titled system by providing a circuit to write/read in/from a holding memory, executing an instruction to write/read from an external device only within a time allocated to the frame synchronizing bit signal of a time division highway, an thus executing the reading/writing from/in the holding memory. CONSTITUTION:If a read or write instruction is inputted from the external device 13 to a instructing line 18, the read/write instruction is stored in an instruction holding register 14, and an address pertinent to the instruction is stored in an address holding register 15. Also, a data pertinent to the instruction is stored in a data holding register 16. Later on, during the time allocated to a frame synchronizing bit signal shown by a timing line 17, the write/read instruction from the external device 13 is executed in accordance with the value in the register 15 and that in the register 16. With this constitution, only one time allocation of operating time to a holding memory is necessary during one time slot. Therefore, a memory element whose operational rate is low can be used.
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