发明名称 |
Feed forward clock and data recovery unit for multiple lane application, has feed forward phase tracking unit to track sampling time to center of unit interval of received bit stream, and data recognition unit to recover stream |
摘要 |
<p>The recovery unit has a feed forward phase tracking unit for tracking a sampling time to a center of a unit interval (UI) of a received serial data bit stream. A data recognition unit recovers the received data bit stream. The data recognition unit has parallel data recognition finite impulse response (FIR)-filters connected to a first-in-first-out (FIFO)-register. The FIFO register outputs the recovered data bit stream via an output terminal of the recovery unit. An independent claim is also included for a method for clock and data recovery of a received serial data bit stream.</p> |
申请公布号 |
DE102004014970(A1) |
申请公布日期 |
2004.12.16 |
申请号 |
DE20041014970 |
申请日期 |
2004.03.26 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
GREGORIUS, PETER |
分类号 |
H03L7/081;H03L7/107;H03L7/18;H04L7/00;H04L7/033;(IPC1-7):H04L7/02 |
主分类号 |
H03L7/081 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|