发明名称 |
ZERO THRESHOLD VOLTAGE PFET AND METHOD OF MAKING SAME |
摘要 |
A zero threshold voltage (ZVt) pFET (104) and a method of making the same. The ZVt pFET is made by implanting a p-type substrate (112) with a retrograde n-well (116) so that a pocket (136) of the p-type substrate material remains adjacent the surface of the substrate. This is accomplished using an n-well mask (168) having a pocket-masking region (184) in the aperture (180) corresponding to the ZVt pFET. The n-well may be formed by first creating a ring-shaped precursor n-well (116') and then annealing the substrate so as to cause the regions of the lower portion (140') of the precursor n-well to merge with one another to isolate the pocket of p-type substrate material. After the n-well and isolated pocket of p-type substrate material have been formed, remaining structures of the ZVt pFET may be formed, such as a gate insulator (128), gate (132), source (120), and drain (124).
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申请公布号 |
US2004251496(A1) |
申请公布日期 |
2004.12.16 |
申请号 |
US20030250190 |
申请日期 |
2003.06.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BROWN JEFFREY S.;LAM CHUNG H.;MANN RANDY W.;OPPOLD JEFFREY H. |
分类号 |
H01L21/8234;H01L29/10;H01L29/78;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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