发明名称 STORAGE DEVICE
摘要 PURPOSE:To improve use efficiency of a memory section by invalidating commands when a normal read command and a write command for an address in which partial writing is being performed are issued and preventing distortion of data. CONSTITUTION:Read-out and write-in operation are performed during partial writing operation. This operation interval is an operational time of a data correcting circuit 10 and a partial writing control section 1, and affords sufficient operational time for a memory section 8. Then, an address monitoring circuit 3 monitors a memory address, other than an executive address, a selector 4a selects an address 20, a selector 4b selects write data 21, normal read-out and write-in are performed by a memory control signal 23 generated by a memory control signal generating circuit 2 when a normal read command and or write command is issued, and distortion of data is prevented. Also, a normal read or write command exists in the address, the circuit 3 reports occurrence of an error by an error report signal 25, invalidates these commands, distortion of data can be prevented and use efficiency of the memory section 8 can be improved.
申请公布号 JPH07130195(A) 申请公布日期 1995.05.19
申请号 JP19930246792 申请日期 1993.10.01
申请人 KOFU NIPPON DENKI KK 发明人 WATANABE TAKANORI
分类号 G11C11/401;G06F12/16;G11C29/00;G11C29/42 主分类号 G11C11/401
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