TWO REDUCIBLE TRANSISTOR MEMORY ELEMENTS FOR PREVENTING DEGRADATION OF PUNCH-THROUGH CHARACTERISTICS BETWEEN SOURCE/DRAIN REGIONS AND FABRICATING METHOD THEREOF

摘要

PURPOSE: Two reducible transistor memory devices and fabricating method thereof are provided to prevent the degradation of the punch-through characteristics by removing a demand of the source/drain regions for an impurity diffusion layer. CONSTITUTION: Two or more isolation patterns(116) are arranged on a predetermined region of a semiconductor substrate in order to define an active region including the first region and a pair of second regions. A multilayered pattern(124) includes a gate insulating pattern, a storage node, and a multi-tunnel junction barrier pattern. A data line(120a) is parallel to the second regions while passing over an upper surface of the multilayered pattern. A control line(132a) is used for covering partially sidewalls of the multilayered pattern and crossing the second regions. A source region(145a) and a drain region(145b) are arranged on both sides of the multilayered pattern. A gate interlayer dielectric is inserted between the control line and the sidewalls of the multilayered pattern and between the control line and the active region.