发明名称 |
Input buffer circuit |
摘要 |
An input buffer circuit includes front stage circuits and a succeeding stage circuit. Each of the front stage circuits has a logic threshold voltage different from each other. The succeeding stage circuit has a P type MOS transistor and an N type MOS transistor connected in series. The succeeding circuit includes inputs connected to the front stage circuit. A logic threshold voltage of the succeeding stage circuit is set to be between the respective logic threshold voltages of the front stage circuits.
|
申请公布号 |
US6828821(B2) |
申请公布日期 |
2004.12.07 |
申请号 |
US20020157239 |
申请日期 |
2002.05.30 |
申请人 |
OKI ELECTRIC INDUSTRY CO, LTD. |
发明人 |
NAGAYAMA ATSUSHI |
分类号 |
H01L27/092;H01L21/8238;H03K19/003;H03K19/0175;(IPC1-7):H03K19/23 |
主分类号 |
H01L27/092 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|