| 摘要 |
High performance memory devices have been realized by applying an Evenly Scaled Multiple Level Architecture (ESMLA) using block select arrangement. A single-bit-line-write mechanism allows us to reduce the number of bit lines by 50% for static memory devices. The resulting memory device can be as fast as registers files while its area is smaller than prior art high-density memory devices. The scaling method of the memory architecture also assures that the speed of the memory devices will scale in the same rate as logic circuits in future IC manufacture technologies.
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