| 摘要 |
PROBLEM TO BE SOLVED: To keep product unit cost from rising due to the use of a plurality of nonvolatile memories or a nonvolatile memory with large volume in saving FPGA rewriting data in a CPU device and to enhance security when employing an arrangement which downloads the FPGA rewriting data from a network. SOLUTION: The CPU device, which includes two or more field programmable gate arrays (FPGA), includes a communication FPGA either including or connected to a communication interface, and a general-purpose FPGA, and effects an initialization process for laying out communication circuits in the communications FPGA at startup using communication FPGA circuit layout data stored in the CPU device and for laying out the circuits of the general-purpose FPGA using general-purpose FPGA circuit layout data obtained using the communication circuits. This makes it possible to place most of the circuit layout data over the network for a reduction in the cost of parts. Also, updating the data on the circuit layout of the FPGA 11 changes an external site where the data on the circuit layout of the FPGA 11 are requested, thereby preventing crackers or the like from monitoring the data on the network. COPYRIGHT: (C)2005,JPO&NCIPI
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