发明名称 Method and system for predicting the execution of conditional instructions in a processor
摘要 A method and system is disclosed for predicting whether a conditional instruction is to be executed in a processor. The processor processes instructions through processing stages including at least a decode stage, an execute stage, and one or more intermediate processing stages therebetween. First, a current condition status of the processor is detected, wherein the condition status shows whether one or more conditions for executing the conditional instruction have been satisfied. After detecting whether one or more associated instructions as being processed during the intermediate processing stages have impacted or will impact the conditions to be satisfied, it is determined whether the conditional instruction should be terminated at the decode stage based on the detected current condition status and the detected impact on the conditions due to the processing of the associated instructions. If it is predicted that there are unsatisfied conditions for executing the conditional instruction in the execute stage, the conditional instruction is terminated in the decode stage so as to avoid utilizing additional processor resources.
申请公布号 US2004230781(A1) 申请公布日期 2004.11.18
申请号 US20030439941 申请日期 2003.05.16
申请人 VIA-CYRIX, INC. 发明人 SHELOR CHARLES F.;DUNCAN RICHARD L.
分类号 G06F9/00;G06F9/32;G06F9/34;G06F9/38;(IPC1-7):G06F9/00 主分类号 G06F9/00
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