SYSTEM AND A METHOD FOR DESIGNING A HYBRID MEMORY CELL WITH MEMRISTOR AND COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR

摘要

The embodiments herein relates to a hybrid non-volatile memory cell system and architecture for designing integrated circuits. The system comprises CMOS access transistor connected to a memristor which stores a data based on a resistance. The system has a word line for accessing the hybrid memory and two bit lines carrying data of mutually opposite values for transferring a data from the memory. The two terminals of the transistor are connected respectively to a first terminal of the memristor and to a first bit line. The gate terminals of the transistors are coupled together to form a word line. The access transistors control the two bit lines during a read and write operation. A control logic performs a read and write operation with the hybrid memory cells. The memory architecture prevents a power leakage during data storage and controls a drift in a state during a read process.

主权项

1. A control logic and a control logic circuit system for controlling an access to a hybrid memory cell, comprising:
a read logic for reading a data from a hybrid non-volatile memory cell, wherein the read logic is designed to satisfy stability requirement; a write logic, wherein the write logic prevents a write operation of a data when the write data is same as a data stored in the hybrid non-volatile memory cell, wherein the control logic performs a read operation and a write operation with one or more hybrid memory cells; and wherein the control logic minimizes a state drift during a read operation from the hybrid non-volatile memory cell, wherein the state drift is minimized by reading the data with a decaying voltage, wherein a direction of read is from OFF state to ON state.